XYCOM AO XVME-530 8-Channel Isolated Analog Output Module

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XYCOM AO XVME-530 8-Channel Isolated Analog Output Module The XVME-530 Analog Output Module (hereafter referred to as AOUT) is a powerful D/A module which can generate eight 12-bit resolution analog signals.   Output can be either voltage or current.   The following output voltage ranges are jumper-selectable: 

0-5V, 0 to lOV, +2.5V, +5V, +lOV.   The jumper-selectable current range is 4-20 mA. 

The eight output channels areoptically isolated (300V) from the digital logic.

The module status/control register (found at module base address + 81H) on intelligent XVME I/O modules provides the current status of the module self-test in conjunction with the current status of the front panel LEDs. The status register on intelligent modules is a "Read Only" register and it can be read by software to determine if the board is operating properly. 

INTERRUPT CONTROL

Interrupts for non-intelligent modules can be enabled or disabled by setting/clearing the Interrupt Enable bit in the module status register. The status of pending on-board interrupts can also be read from this register. Interrupt control for intelligent modules is handled by the Interprocessor Communications Protocol. 

COMMUNICATIONS BETWEEN PROCESSORS

Communications between an intelligent "masterT1 and an intelligent 1/0 module is governed by XY COM's Interprocessor Communication (IPC) Protocol. This protocol involves the use of 20-byte Command Block data structures, which can be located anywhere in shared global RAM or dual-access RAM on an 1/0 module, to exchange commands and data between a host processor and an 1/0 module. Interprocessor Communication Protocol is thoroughly explained in Chapter 3 of this manual. 

THE KERNEL

To standardize its XVME 1/0 modules, XYCOM has designed them around "kernels" common from module to module. Each different module type consists of a standard kernel, combined with module-dependent application circuitry. Module standardization results in more efficient module design and allows the implementation of the Standard 1/0 Architecture. The biggest benefit of standardization for intelligent modules is that it allows the use of a common command language or protocol (Interprocessor Communication Protocol in this case).

The intelligent kernel is based around a 68000 microprocessor. This design provides the full complement of VMEbus Requester and Interrupter options for master/slave

interfacing, as well as all of the advantages provided by the various facets of the XYCOM Standard 1/0 Architecture (as covered earlier in this appendix).